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[OtherMIPS相关材料

Description: MIPS相关材料 及应用样例
Platform: | Size: 347016 | Author: 13611868661@qq. | Hits:

[VHDL-FPGA-VerilogminiMIPS

Description: 这是一个基于mips-I结构的处理器,32bit,冯诺依曼结构-This is based on a MIPS- I structure of the processor, 32bit, von Neumann structure
Platform: | Size: 222208 | Author: tsm998 | Hits:

[ARM-PowerPC-ColdFire-MIPSmips_creative

Description: 一个完整的MIPS CPU,创新设计,浙江大学某学生作品,有完整的说明文档、仿真文件和测试文件,可以直接综合和仿真。-a complete MIPS CPU, innovative design, a student of Zhejiang University works with complete documentation, simulation and test documents, and can be directly integrated simulation.
Platform: | Size: 1866752 | Author: 梁文锋 | Hits:

[VHDL-FPGA-Verilogmipsinverilogandvhdl

Description: mips prcessor in Verilog and vhdl-mips prcessor in vhdl and Verilog
Platform: | Size: 7168 | Author: 张六封 | Hits:

[MPIsource

Description: MIPS处理器VHDL代码,实现加法,减法乘除等运算,可综合,-MIPS processor VHDL code, realize adder, subtraction multiplication and division and other operations can be integrated,
Platform: | Size: 6144 | Author: 陈丰 | Hits:

[MPIMIPS

Description: MIPS处理器的顶层VHDL代码,可综合,可仿真,属硬件描述语言,集成电路设计代码-MIPS processor top-level VHDL code can be integrated to simulation, a hardware description language, integrated circuit design code
Platform: | Size: 1024 | Author: 陈丰 | Hits:

[MPIdatapath

Description: MIPS处理器的数据通道VHDL代码,可综合,可仿真,属硬件描述语言,集成电路设计代码-MIPS processor data channel VHDL code can be integrated to simulation, a hardware description language, integrated circuit design code
Platform: | Size: 1024 | Author: 陈丰 | Hits:

[ARM-PowerPC-ColdFire-MIPSor2000

Description: 这是一个MIPS架构的开发的CPU软核OR2000,比OR1200更高的版本,里面还有SOC程序,多次MPW流片成功-This is a MIPS architecture to develop the CPU soft-core OR2000, higher than OR1200 version, there is also SOC procedures, many times MPW silicon success
Platform: | Size: 102400 | Author: liming | Hits:

[ARM-PowerPC-ColdFire-MIPSmips3

Description: modelsim+dc开发的4级流水线结构的MIPS CPU,完成基本的逻辑运算和跳转。测试程序为希尔排序,结果正确。-modelsim+ dc development of four pipelined structure MIPS CPU, the completion of the basic logic operations and Jump. Test procedure for the Hill to sort the results correctly.
Platform: | Size: 307200 | Author: 杨春 | Hits:

[VHDL-FPGA-VerilogDigital-Design-and-Computer-Architecture-VHDL

Description: 《数字设计和计算机体系结构》一书MIPS VHDL源码。
Platform: | Size: 4096 | Author: guo | Hits:

[VHDL-FPGA-VerilogMIPS

Description: 组成原理大作业--基于MIPS的运算器设计,内附详细设计文档,包含设计文档和使用手册,主程序,测试程序,还有设计的框图等。实现了可以执行基本的MIPS有关运算器相关的指令共17条,用Verilog编写。-Composition Principle big operation- based on the MIPS computing design, containing a detailed design document, including design documentation and user manual, the main program, testing procedures, as well as the design of the diagram and so on. Can be implemented to achieve a basic computing device on the MIPS instruction were related to 17, prepared using Verilog.
Platform: | Size: 3060736 | Author: da | Hits:

[ARM-PowerPC-ColdFire-MIPSMIPS

Description: 带分支预测的MIPS流水线的verilog原代码。 详细介绍了流水线的设计代码-Branch prediction with the MIPS pipeline verilog source code. Details of pipeline design code
Platform: | Size: 17408 | Author: 张鹤 | Hits:

[ARM-PowerPC-ColdFire-MIPSMIPS-Implementation

Description: mips 32 implementation
Platform: | Size: 3658752 | Author: aladin6891 | Hits:

[VHDL-FPGA-Verilogvhdl-MIPS

Description: Quartus-Altera Nios... VHDl based, complete MIPS implementation, document, flowcharts plus code
Platform: | Size: 4330496 | Author: ak | Hits:

[VHDL-FPGA-Verilogmips

Description: 使用verilog設計的MIPS處理器,mips處理機的模擬且可合成驗証-MIPS processor using the verilog design, mips processor synthesis of analog and can be verified
Platform: | Size: 4096 | Author: 張日 | Hits:

[VHDL-FPGA-VerilogMIPS

Description: MIPS处理器的组员大作业,可以直接运行,提交,环境是quartus-MIPS processor crew great job, you can run directly, the author, the environment is quartusII
Platform: | Size: 3059712 | Author: fan | Hits:

[Embeded-SCM Developmips

Description: 在maxplus上实现了一个5级流水线的mips cpu,含cache-In maxplus to achieve a 5-stage pipeline of the mips cpu, with cache
Platform: | Size: 449536 | Author: tong tong | Hits:

[VHDL-FPGA-Verilogmips

Description: MIPs CPU,VERILOG代码,经过QUARTUS综合,时序分析,验证无误。-MIPS CPU
Platform: | Size: 5120 | Author: 王龙 | Hits:

[VHDL-FPGA-Verilogvhdl-pipeline-mips_latest.tar

Description: pipeline mips in vhdl
Platform: | Size: 1137664 | Author: aliakbar | Hits:

[VHDL-FPGA-Verilogmips-cpu

Description: 单周期的mips处理器设计,用vhdl语言实现各个模块的功能-Single-cycle mips processor design, using vhdl language functions of each module
Platform: | Size: 117760 | Author: 王晓强 | Hits:
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